Repositório RCAAP

In this paper we present four wave synchronizers and four symbol synchronizers: analog, hybrid, combinational and sequential. All them are of the class closed loop. The wave synchronizers are vacated to synchronize withwaves or signals with deterministic phase/transition. The symbol synchronizers are vacated to synchronize withsymbols or signals with random phase/transition. The main objective is to study and compare the performance of the different wave and symbol synchronizers.

This paper describes the steps to be executed for the design of an FPGA-based circuit that sorts ternary vectors of a matrix (with the size 16x16) and visualizes the result on a VGA monitor screen. The initial matrix is arbitrary filled with values 0, 1 and '-' (don't care) and then it is sorted using the bubblesort algorithm. Finally the initial and the sorted matrices will be displayed on themonitor screen.

This paper describes the ARPA project. The aim of this project is to develop an opensource System-on-Chip model for real-time applications. The main component of the SoC is a MIPS based RISC processor. It is implemented using a pipelined Simultaneous Multithreading (SMT) structure, which allows exploring the Instruction and Task Level Parallelism, decrease the contexts witching time and avoid speculative execution. Another fundamental component of the SoC is the Operating System Coprocessor, which implements in hardware some of the operating system functions, such as task scheduling, switching, syrichronization, communication and timing. The proposed approach allows building high performanceand time predictable processors optimized for embedded real-time systems that consume less energy thari currently available superscalar processors.

This article describes StackFences, a run-time technique for detecting overflows in local variables in C programs. This technique is different from all others developed so far because it tries to detect expiicit overflow occurrences, instead of detecting if a particular stack value, namely a return address, was corrupted because of a stack overflow. Thus, StackFences is useful not only for detecting intrusion attempts but also for checking the run-time robustness of applications. We also conceived different policies for deploying StackFences, allowing a proper balancing between detection accuracy and performance. For testing StackFences we developed a prototype for Linux systems using TCC (Tiny C Compiler). C modules compiled with StackFences are fully compatible with C modules compiled differently and standard libraries. Effectiveness tests confirmed that all overflows in local variables are detected before causing any severe damage. Performance tests ran with several tools and parameters showed an acceptable performance degradation.

A new optical system with wavelengthencoding/time-spreading Optical Code Division Multiple Access (O-CDMA) is proposed. Using orthogonal polarizations we can have a simple encoding and decoding of two independent channels and achieve differential detection. The resulting system has a constant null decision threshold and therefore a superior performance when compared with a system with direct detection.

The paper describes some results obtained within a final year project for LECT (Licenciatura em Engenhariade Computadores e Telemática). The project is devoted to the design and optimization of FPGA-based co-processors for data extensive applications (such as solving combinatorial problems over discrete matrices). One particular problem that has been studied in detail is transferring high volume of data to an FPGA-based coprocessor and receiving the results from the co-processor, which can be coded very compactly. In order to reduce communication time, a technique of data compression/decompression has been employed in such away that a host computer compresses data and transfers them to an FPGA-based co-processor. The latter either decompresses them or handles the compressed records. The paper describes compression/decompression algorithms based on the slightly modified Huffman method, their implementation in C++ language and FPGA-based circuits that provide for the relevant decompression. All hardware has been designed from specification in Handel-C and implemented in FPGA XC2V1000-4 of Virtex-II family available on a RC200 prototyping board of Celoxica.

This paper describes an FPGA-based circuit that implements two arithmetical operations (+, -) and interactswith a monitor and a touch panel connected to the FPGA. Functionality of the circuit has been described in VHDL. The VHDL specification was compiled and converted in Xilinx ISE 5.2i environment to a bitstream for FPGA. The designed circuit was tested in a FPGA Spartan-IIE XC2S300E, which is a primary reconfigurable component of TE-XC2SE board supplied by Trenz Electronics. The paper demonstrates some capabilities of VHDL and Xilinx ISE, as well as interaction features with external components.

The paper analyses and compares the most widely used textual and graphical languages for formal specification of digital control units. It demonstrates that graphical languages are more adequate for manual specification and usually it is easier to learn them. As a rule, commercially available tools for the design of digitalsystems support different languages.

This article envisages the study of wireless access points in an open access configuration. In this configuration, the users of the service have access to the network without the need of authentication and without accounting their access. Therefore, we intend to consider the particularities of an access perspective of this kind. Various technological possibilities to the wireless access network are presented and analyzed. The problem of economical sustainability of this service is also addressed. Finally, we also present two possibilities of implementation of this configuration considering two different situations for usage.

This paper introduces the fundamentals of real-time operating systems. The topics covered include the motivation for using this class of systems, the application domains, the tasks used for their implementation and the scheduling policies normally employed.

Este artigo descreve o trabalho desenvolvido no âmbito da disciplina de opção de Sistemas de Tempo-Real, com o objectivo de criar um simulador, num ambiente multitarefa com garantias temporais, de um sistema de controlo de tiro de um carro de combate, ou seja, todo o sistema necessário para que um carro de combate realize a aquisição, seguimento e eventual destruição de um alvo que esteja dentro da sua área de “visão”. Inicialmente descreve-se de forma sumária o sistema real a simular, procurando extrair os módulos que o compõem. No seguimento da referida análise é efectuada a transposição para o motor de simulação, terminando com uma breve alusão à mecânica de utilização do executivo de tempo-real SHaRK (Soft and Hard Real-time Kernel).

O ReTMiK é um kernel de Tempo-Real, criado em 1997 no âmbito do concurso Micro-Rato da UA. Desde 1998 que foi utilizado por várias equipas no referido concurso, sem nunca ter sofrido qualquer alteração. Em finais de 2003, no âmbito da disciplina Sistema de Tempo-Real, opção do 5º ano da LEET, foram adicionadas novas funcionalidades a este kernel por forma a disponibilizar novas possibilidades aos seus utilizadores, bem como para auxiliar o desenvolvimento de um sistema operativo baseado no ReTMiK. Entre as principais novidades desta versão encontram-se novos mecanismos para facilitar a sincronização e gestão de tarefas, novos algoritmos de escalonamento e a adopção de uma licença de software livre.

Este artigo descreve sucintamente um executivo (kernel) tempo-real para os microprocessadores da família PIC18FXX8, desenvolvido pelos autores no âmbito da disciplina de Sistemas de Tempo-Real, opção do 5º ano da LEET e LECT. Nele são abordados aspectos gerais da implementação deste tipo de executivos, como sejam, escalonabilidade das tarefas no acesso ao processador, a preempção de tarefas e os tempos de activação. São também abordados aspectos específicos desta família de microprocessadores, como a mudança de contexto das tarefas e a gestão temporal. Foram realizadas análises de carga do executivo num sistema multitarefas com um PIC18F258. O espaço ocupado pelo kernel na memória de código é de 2900 words e na memória de dados de 39 bytes mais 31 por tarefa. A resolução temporal do kernel é de 2ms.

This paper describes an FPGA-based circuit, which permits to specify and to simulate finite state machines (Moore model). Interaction with the circuit is provided through a graphical interface designed for a VGA monitor with the relevant support for a mouse and a keyboard. Functionality of the circuit was described in Handel-C, which is a system-level specification language developed by Celoxica. The Handel-C description wasverified in Celoxica DK1 environment and compiled to an EDIF file. The latter was used as an input for ISE 5.2 software, which generated a bitstream for an FPGA. The designed circuit was tested in the RC100 prototyping board of Celoxica that contains an FPGA XC2S200 of Spartan-II family of Xilinx.

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O uso de um kernel de tempo-real no controlo de robots torna-se fundamental quando estão envolvidos vários comportamentos ou processos com requisitos temporais diferentes. No exemplo do concurso Micro-Rato [1], os vários robots necessitam de ter uma grande reactividade no que toca à detecção e desvio de obstáculos, uma mais lenta atenção ao farol e monitorizar a uma baixa frequência a tensão da bateria ou botões de controlo. O kernel de tempo real permite ainda que os robots tenham uma noção temporal precisa, necessária ao cumprimento dos vários requisitos temporais relacionados com a prova. No âmbito da componente prática da disciplina de Sistemas de Tempo Real, opção do 5º ano da LEET e LECT foi desenvolvido um sistema de controlo para o robot Bulldozer (1ª versão), baseado no executivo de tempo real ReTMiK.

This article presents one brief introduction to the MPEG-7 standard, Multimedia Content Description Interface, and one of the possible applications to describe videos of a digital library, in a way that it makes possible indexing and searching this information.

In this paper we consider signal and image reconstruction problems, and present two Java applets that can be used as teaching tools or as a means of comparing and assessing specific signal and image reconstruction algorithms. The applets have user-friendly graphical interfaces, and the simulations can be carried out using data supplied by user, in any computer platform that supports Java.

Fourier theory plays a central role in tomography and a special class of reconstruction methods, known as direct Fourier methods, belongs directly from this theory. Recently, related to the demand for 3D reconstruction, the interest for these methods has been growing due to their reduced computational complexity. In this paper we are going to review the application of Fourier theory to the field of tomograghy, both for projection and reconstruction. These basics of direct Fourier methods as well as some specific implementation are addressed.

Esta edição da Revista do Departamento, renova o esforço de divulgação das actividades científicas e pedagógicas que docentes e discentes do Departamento de Electrónica e Telecomunicações da Universidade de Aveiro acharam por bem, desta forma, tornar públicas. (...)